Single Precision Floating Point Unit

Single Precision Floating Point Unit

Implemented according to the IEEE standard 754 for normalized single-precision floating-point numbers. The IP is optimized for performance and HW resources usage and it supports the following operations:

  • Arithmetic: Add, Subtract, Multiply, Divide
  • Comparison: Greater or equal, Smaller or equal, Greater, Smaller, Equal, Not equal
  • Conversion: Integer to float, Unsigned integer to float, Float to integer, Float to unsigned integer

The supported rounding mode is round-to-nearest-even

Dedicated output flag interface to highlight the occurrence of the following events:

  • An input operand is Not a Number
  • An input operand is ± infinite
  • The result is ± Underflow
  • The result is ± Overflow
  • The result is Not a Number
  • The result is Zero
  • The result is positive or negative.
  • A division by zero

It has a simple user interface and can be used also as a HW accelerator for processor’s custom instructions

For flexibility, all the operations are configurable to be active or not within the IP.